The variable statement

The "variable" statement is used to declare variables. The following is an example.

variable a,b,abc,z,xyz

Variable statements may appear anywhere in the set of specifications. There is no limit to the number of variables that may be declared. Variable names are arbitrary strings of letters, digits, underlines and periods. Case is significant. Any variable name that is used but not declared is assumed to be a net of the circuit under test. Thus undeclared variables will normally be reported as non-existent nets. If a variable has the same name as a net in the circuit under test, the variable name overrides the net name. There is no limit on the length of variable names. All variables are treated as unsigned 32-bit integers.