Redirecting Output

Generating logic all inline is the natural mode of operation for the macro processor. At times it may be desirable to generate a subnetwork and place references to it inline. This complicates the data generation problem, because the subnetwork and the reference must be generated at different places in the code, and will be separated by an unpredictable number of statements.

The output redirection facility of the macro processor was designed to solve this problem. The output of the macro processor is divided into three sections, the standard output or inline section, the network section, and the subnetwork section. For the examples given above, only the inline section is used. When output is generated the inline section appears first, the network section second, and the subnetwork section third. Output may be added to these sections in arbitrary order. For example consider the following macro definition of a full adder.

fulladd: 'macro
'inputs 'a,'b,'c
'outputs 'sum,'carry
'gblint 'fa_done
'if 'fa_done'==0
'subnetwk
fa: circuit
inputs a,b,c
outputs sum,carry
xor (a,b),i1
xor (i1,c),sum
and (a,b),i2
and (a,c),i3
and (b,c),i4
or (i1,i2,i3),carry
endcircuit
'assign 'fa_done,1
'endif
'stdout
'label: fa ('a,'b,'c),('sum,'carry)
'endmacro

The statement 'subnetwk changes the current output section to be the subnetwork section. The statement 'stdout changes the current output section to the inline section. The 'network statement changes the current output section to the network section. In this example, the definition of the circuit "fa" will appear after the all calls to "fa".

The output redirection feature also allows several circuits to be constructed simultaneously in piecemeal fashion. This is done by creating named subnetwork and network sections. The following example demonstrates the use of named subnetwork sections.

'exam: 'macro
'subnetwk a
a: circuit
'subnetwk b
b: circuit
'subnetwk a
input aa
output aaa
not aa,aaa
endcircuit
'subnetwk b
input bb
output bbb
not bb,bbb
endcircuit
'stdout
'endmacro

In this example, two named subnetwork sections, a, and b are defined. Named subnetwork sections appear in the order defined in the subnetwork section of the output. If the unnamed subnetwork section is used in conjunction with named subnetwork sections, it is treated as a named subnetwork section whose name is the null string. The first 'subnetwk statement encountered that contains a particular name defines a named subnetwork section. All other subnetwork sections containing the same name add to the named subnetwork section. The name may be a complex expression. Named network sections are handled similarly.