Each PLA wordline consists of two sections, the AND plane section and the OR plane section. Each section is broken into one or more fields. AND plane fields contain inputs that will be tested by the PLA. OR plane fields may contain many different types of data, some examples of which are data, control signal values, and so forth. Each field must be declared using a statement similar to the following.
new_state: field width=12,position=15
This statement declares an OR plane field named "new_addr" which has a width of 12 bits and begins at bit 15 of the OR plane. The bits of each word are numbered from the left starting with zero. Each field in the OR plane must be declared, even if it is never used. The order of the "field" statements is not important, since each statement has both a width and position associated with it. If the "width" specification is omitted, a width of one is assumed. If the "position" specification is omitted, a position of zero is assumed. Or plane fields may not overlap.
AND plane fields are declared in a similar fashion as the following declaration illustrates.
cond_one: field width=1,position=15,type=input
The only difference between an AND plane declaration and an OR plane declaration is the presence of the parameter "type=input". The "position" parameter indicates a position within the AND plane. All AND plane fields must be declared even if they are always "don't care." AND plane fields may not overlap.