The expression statement is used to assign values to variables and nets. An arbitrary expression is used as the op-code of the statement. In order to be meaningful, the expression should contain at least one assignment operator. The following illustrates the use of assignments to create a test vector for a circuit.
inputa->1,inputb->0,clk1->0
go
clk2->1
go
The names "inputa" and "inputb" are assumed to be primary inputs of the circuit under test. Note that the values of these inputs is identical for both "go" statements. The SET statement is a variation of the expression statement. This statement is illustrated below.
set inputa->1,inputb->0,clk1->0
go
set clk2->1
go