Logic Design

Boolean Algebra

Algebraic Laws

Boolean Expressions

Superfluous Terms

Prime Implicants

Minimization and Minterms

Minimization with Maps

Procedure

Procedure 2

Applied to Previous Map

A 4-Variable Karnaugh Map

First Minimization

Second Minimization

Minimal Forms for Previous Slides:

Quine McClusky Minimization

Quine-McClusky Procedure

More Quine-McClusky

Yet More Quine-McClusky

Quine-McClusky Example 1

Quine-McClusky Example 2

Quine-McClusky Example 3

Quine-McClusky Example 4

Basic Logic Symbols

The Exclusive Or Function

A Simple Logic Diagram

Additional Logic Symbols

Sequential Logic

An RS Flip-Flop

RS Characteristics

Instability

D Flip-Flops

D-Flip Flop Characteristics

A Clocked D Flip-Flop

Clocked D-Flip Flop Characteristics

Flip-Flop Symbols

A CMOS Flip-Flop

CMOS Logic Elements

An Asynchronous Sequential Circuit

Asynchronous Circuits

A Synchronous Sequential Circuit

Synchronous Circuits

Register Symbol

Register Issues

Tristate Elements

CMOS Tri-state Buffers

Tri-State Buffer Issues

More Tri-State Issues

The CMOS Transmission Gate

Transmission Gate Issues